端口大小 (8) 与端口 'A' 的连接大小 (4) 不匹配
Port size (8) does not match connection size (4) for port 'A'
谁能用这个测试平台解决我的问题？它总是给我 sout0 和 sout1 的 Z，我不得不提一下，在模拟过程中，Modelsim 显示了一些警告。
测试平台：
`timescale 1ns/1ns
module NMA_TB();
wire cout;
wire [3:0]sout0;
wire [3:0]sout1;
reg [3:0] a, b;
reg cin;
NMA #3 nma(a,b, cin, sout0,sout1,cout);
initial begin
#5 cin = 1;
#0 a = 8'b11111111;
#0 b = 8'b11111111;
#500
#0 a = 8'b00000011;
#0 b = 8'b00000011;
#500
#0 a = 8'b11000000;
#0 b = 8'b10000000;
#500 $stop;
end
endmodule
NMA verilog：
`include "TMA.v"
`timescale 1ns/1ns
module NMA #(parameter n = 3)(input [n+n+1 : 0] A, input [n+n+1 : 0] B, input carry_in, output [n:0] sum_out0, [n:0] sum_out1, carry_out);
wire [n : 0] w1;
wire [n : 0] s0;
wire [n : 0] s1;
assign w1[0] = carry_in;
assign carry_out = w1[(n-1)/2];
genvar k;
generate
for(k = 0; k < n; k=k+1) begin : NMA_gates
TMA tma(A[k+k], B[k+k], A[k+k+1], B[k+k+1], w1[k], s0[k], s1[k], w1[k+1]);
end
endgenerate
endmodule
TMA（基于双位多路复用器的加法器）verilog：
`timescale 1ns/1ns
module TMA(input a0, b0, a1, b1,cin, output sum0, sum1,cout);
wire cout0;
assign #45 sum0= a0 ? (b0 ? cin : ~cin) : (b0 ? ~cin : cin);
assign #45 cout0= a0 ? (b0 ? 1 : cin) : (b0 ? cin : 0);
assign #45 sum1=a1 ? (b1 ? cout0 : ~cout0) : (b1 ? ~cout0 : cout0);
assign #45 cout=a1 ? (b1 ? 1 : cout0) : (b1 ? cout0 : 0);
endmodule
警告是：
Warning: (vsim-3015) [PCDPC] - Port size (8) does not match connection
size (4) for port 'A'. The port definition is at:
C:/Users/AliZ/Desktop/CA3/NMA.v(3).
Time: 0 ns Iteration: 0 Instance: /NMA_TB/nma File:
C:/Users/AliZ/Desktop/CA3/NMA_N_TB.v Line: 8 Warning: (vsim-3015)
[PCDPC] - Port size (8) does not match connection size (4) for port
'B'. The port definition is at: C:/Users/AliZ/Desktop/CA3/NMA.v(3).
Time: 0 ns Iteration: 0 Instance: /NMA_TB/nma File:
C:/Users/AliZ/Desktop/CA3/NMA_N_TB.v Line: 8 Warning: (vsim-3015)
[PCDPC] - Port size (4) does not match connection size (1) for port
'carry_out'. The port definition is at:
C:/Users/AliZ/Desktop/CA3/NMA.v(3).
Time: 0 ns Iteration: 0 Instance: /NMA_TB/nma File:
C:/Users/AliZ/Desktop/CA3/NMA_N_TB.v Line: 8
sum_out0 和 sum_out1 在 NMA 模块中未被驱动。您将它们声明为 output 个端口，但您没有对它们进行分配。
这些更改修复了编译警告并删除了 sout1[2:0] 和 sout0[2:0] 上的 Z。参考标有////:
的行
module NMA_TB();
wire cout;
wire [3:0]sout0;
wire [3:0]sout1;
reg [7:0] a, b; ////
reg cin;
NMA #3 nma(a,b, cin, sout0,sout1,cout);
initial begin
#5 cin = 1;
#0 a = 8'b11111111;
#0 b = 8'b11111111;
#500
#0 a = 8'b00000011;
#0 b = 8'b00000011;
#500
#0 a = 8'b11000000;
#0 b = 8'b10000000;
#500 $stop;
end
endmodule
module NMA #(parameter n = 3)(input [n+n+1 : 0] A, input [n+n+1 : 0] B, input carry_in, output [n:0] sum_out0, [n:0] sum_out1, output carry_out); ////
wire [n : 0] w1;
wire [n : 0] s0;
wire [n : 0] s1;
assign sum_out0 = s0; ////
assign sum_out1 = s1; ////
assign w1[0] = carry_in;
assign carry_out = w1[(n-1)/2];
genvar k;
generate
for(k = 0; k < n; k=k+1) begin : NMA_gates
TMA tma(A[k+k], B[k+k], A[k+k+1], B[k+k+1], w1[k], s0[k], s1[k], w1[k+1]);
end
endgenerate
endmodule
sout0[3]还是Z，但是你要弄清楚应该怎么驱动。
顺便说一句，您可能应该使用以下语法（3 两边的括号）：
NMA #(3) nma(a,b, cin, sout0,sout1,cout);
IEEE Std 1800-2017 将括号显示为强制性的；我很惊讶我们的模拟器没有产生编译错误。
谁能用这个测试平台解决我的问题？它总是给我 sout0 和 sout1 的 Z，我不得不提一下，在模拟过程中，Modelsim 显示了一些警告。
测试平台：
`timescale 1ns/1ns
module NMA_TB();
wire cout;
wire [3:0]sout0;
wire [3:0]sout1;
reg [3:0] a, b;
reg cin;
NMA #3 nma(a,b, cin, sout0,sout1,cout);
initial begin
#5 cin = 1;
#0 a = 8'b11111111;
#0 b = 8'b11111111;
#500
#0 a = 8'b00000011;
#0 b = 8'b00000011;
#500
#0 a = 8'b11000000;
#0 b = 8'b10000000;
#500 $stop;
end
endmodule
NMA verilog：
`include "TMA.v"
`timescale 1ns/1ns
module NMA #(parameter n = 3)(input [n+n+1 : 0] A, input [n+n+1 : 0] B, input carry_in, output [n:0] sum_out0, [n:0] sum_out1, carry_out);
wire [n : 0] w1;
wire [n : 0] s0;
wire [n : 0] s1;
assign w1[0] = carry_in;
assign carry_out = w1[(n-1)/2];
genvar k;
generate
for(k = 0; k < n; k=k+1) begin : NMA_gates
TMA tma(A[k+k], B[k+k], A[k+k+1], B[k+k+1], w1[k], s0[k], s1[k], w1[k+1]);
end
endgenerate
endmodule
TMA（基于双位多路复用器的加法器）verilog：
`timescale 1ns/1ns
module TMA(input a0, b0, a1, b1,cin, output sum0, sum1,cout);
wire cout0;
assign #45 sum0= a0 ? (b0 ? cin : ~cin) : (b0 ? ~cin : cin);
assign #45 cout0= a0 ? (b0 ? 1 : cin) : (b0 ? cin : 0);
assign #45 sum1=a1 ? (b1 ? cout0 : ~cout0) : (b1 ? ~cout0 : cout0);
assign #45 cout=a1 ? (b1 ? 1 : cout0) : (b1 ? cout0 : 0);
endmodule
警告是：
Warning: (vsim-3015) [PCDPC] - Port size (8) does not match connection size (4) for port 'A'. The port definition is at: C:/Users/AliZ/Desktop/CA3/NMA.v(3).
Time: 0 ns Iteration: 0 Instance: /NMA_TB/nma File: C:/Users/AliZ/Desktop/CA3/NMA_N_TB.v Line: 8 Warning: (vsim-3015) [PCDPC] - Port size (8) does not match connection size (4) for port 'B'. The port definition is at: C:/Users/AliZ/Desktop/CA3/NMA.v(3).
Time: 0 ns Iteration: 0 Instance: /NMA_TB/nma File: C:/Users/AliZ/Desktop/CA3/NMA_N_TB.v Line: 8 Warning: (vsim-3015) [PCDPC] - Port size (4) does not match connection size (1) for port 'carry_out'. The port definition is at: C:/Users/AliZ/Desktop/CA3/NMA.v(3).
Time: 0 ns Iteration: 0 Instance: /NMA_TB/nma File: C:/Users/AliZ/Desktop/CA3/NMA_N_TB.v Line: 8
sum_out0 和 sum_out1 在 NMA 模块中未被驱动。您将它们声明为 output 个端口，但您没有对它们进行分配。
这些更改修复了编译警告并删除了 sout1[2:0] 和 sout0[2:0] 上的 Z。参考标有////:
module NMA_TB();
wire cout;
wire [3:0]sout0;
wire [3:0]sout1;
reg [7:0] a, b; ////
reg cin;
NMA #3 nma(a,b, cin, sout0,sout1,cout);
initial begin
#5 cin = 1;
#0 a = 8'b11111111;
#0 b = 8'b11111111;
#500
#0 a = 8'b00000011;
#0 b = 8'b00000011;
#500
#0 a = 8'b11000000;
#0 b = 8'b10000000;
#500 $stop;
end
endmodule
module NMA #(parameter n = 3)(input [n+n+1 : 0] A, input [n+n+1 : 0] B, input carry_in, output [n:0] sum_out0, [n:0] sum_out1, output carry_out); ////
wire [n : 0] w1;
wire [n : 0] s0;
wire [n : 0] s1;
assign sum_out0 = s0; ////
assign sum_out1 = s1; ////
assign w1[0] = carry_in;
assign carry_out = w1[(n-1)/2];
genvar k;
generate
for(k = 0; k < n; k=k+1) begin : NMA_gates
TMA tma(A[k+k], B[k+k], A[k+k+1], B[k+k+1], w1[k], s0[k], s1[k], w1[k+1]);
end
endgenerate
endmodule
sout0[3]还是Z，但是你要弄清楚应该怎么驱动。
顺便说一句，您可能应该使用以下语法（3 两边的括号）：
NMA #(3) nma(a,b, cin, sout0,sout1,cout);
IEEE Std 1800-2017 将括号显示为强制性的；我很惊讶我们的模拟器没有产生编译错误。