VHDL 中的 NULL 语句

Question

VHDL 中 null 语句的实际用途是什么？考虑以下代码

1-

CASE s IS
BEGIN
     WHEN 0 =>    y <= 0;
     WHEN 1 =>    NULL;
END CASE;

2-

CASE s IS
BEGIN
     WHEN 0 =>    y <= 0;
END CASE;

第二个代码中，由于s=1时没有赋值，所以y保留原值。不是吗？所以，我认为在这两种情况下，合成器都会放一个触发器来保持 y.

的先前值

Answer 1

我会引用 IEEE1076-2008:

10.14 Null statement

A null statement performs no action.

null_statement ::= [ label : ] null ;

The execution of the null statement has no effect other than to pass on to the next statement.

NOTE—The null statement can be used to specify explicitly that no action is to be performed when certain conditions are true, although it is never mandatory for this (or any other) purpose. This is particularly useful in conjunction with the case statement, in which all possible values of the case expression shall be covered by choices; for certain choices, it may be that no action is required.

VHDL 语言要求 case 语句中的每个选择都有一个语句：or synthesis will give an error. Example implementation:

case OPCODE is
    when "001" => TmpData := RegA and RegB;
    when "010" => TmpData := RegA or RegB;
    when "100" => TmpData := not RegA;
    when others => null;
end case;

VHDL 中的 NULL 语句

NULL statement in VHDL

null

vhdl