正在计算 CPU 缓存命中
Calculating CPU cache hits
我很难理解 process/formula 是用来计算缓存命中率的。因此，例如，如果我们有一个包含 16 个条目的主内存和一个包含 4 个条目的高速缓存，并且 CPU 加载内存地址：0、1、2、8、9、2'，我如何计算命中数 a) 如果缓存是直接映射的 b) 2 向关联？
假设没有预取器和 LRU 作为替换机制。
a)
对于直接映射缓存，每个内存条目只能在一个缓存条目中。
缓存将像这样映射（默认假设均匀分布）：
Cache 0 --> can hold 0,4,8,12 of the main memory entries.
Cache 1 --> can hold 1,5,9,13 of the main memory entries.
Cache 2 --> can hold 2,6,10,14 of the main memory entries.
Cache 3 --> can hold 3,7,11,15 of the main memory entries.
重置后缓存为空
Load from 0 will be missed and will be cached in cache entry 0.
Load from 1 will be missed and will be cached in cache entry 1.
Load from 2 will be missed and will be cached in cache entry 2.
Load from 8 will be missed and will be cached in cache entry 0 (replaced load 0).
Load from 9 will be missed and will be cached in cache entry 1 (replaced load 1).
load from 2 will be hit and will be taken from cache entry 2.
所以我们有 1 次命中和 5 次未命中，命中率为 1/(5+1) = 1/6 = 16%
b) 对于 2 种关联方式，内存中的每个条目都需要缓存中的 2 个条目。
所以 set0（缓存中的条目 0,1）将保存所有偶数主内存条目，而 set1 将保存所有奇数条目，因此如果我们跨越它，我们将像这样：
cache 0 (set 0) --> can hold 0,2,4,6,8,10,12,14 of the main memory entries.
cache 1 (set 0) --> can hold 0,2,4,6,8,10,12,14 of the main memory entries.
cache 2 (set 1) --> can hold 1,3,5,7,9,11,13,15 of the main memory entries.
cache 2 (set 0) --> can hold 1,3,5,7,9,11,13,15 of the main memory entries.
重置后缓存为空。
Load from 0 will be missed and will be cached in cache entry 0.
Load from 1 will be missed and will be cached in cache entry 2.
Load from 2 will be missed and will be cached in cache entry 1.
Load from 8 will be missed and will be cached in cache entry 0 (replaced load 0 because we replace the Least Recently Used).
Load from 9 will be missed and will be cached in cache entry 3.
load from 2 will be hit and will be taken from cache entry 1.
在这种情况下，命中率是相同的：1/(5+1) = 1/6 = 16%
我很难理解 process/formula 是用来计算缓存命中率的。因此，例如，如果我们有一个包含 16 个条目的主内存和一个包含 4 个条目的高速缓存，并且 CPU 加载内存地址：0、1、2、8、9、2'，我如何计算命中数 a) 如果缓存是直接映射的 b) 2 向关联？
假设没有预取器和 LRU 作为替换机制。
a) 对于直接映射缓存，每个内存条目只能在一个缓存条目中。 缓存将像这样映射（默认假设均匀分布）：
Cache 0 --> can hold 0,4,8,12 of the main memory entries.
Cache 1 --> can hold 1,5,9,13 of the main memory entries.
Cache 2 --> can hold 2,6,10,14 of the main memory entries.
Cache 3 --> can hold 3,7,11,15 of the main memory entries.
重置后缓存为空
Load from 0 will be missed and will be cached in cache entry 0.
Load from 1 will be missed and will be cached in cache entry 1.
Load from 2 will be missed and will be cached in cache entry 2.
Load from 8 will be missed and will be cached in cache entry 0 (replaced load 0).
Load from 9 will be missed and will be cached in cache entry 1 (replaced load 1).
load from 2 will be hit and will be taken from cache entry 2.
所以我们有 1 次命中和 5 次未命中，命中率为 1/(5+1) = 1/6 = 16%
b) 对于 2 种关联方式，内存中的每个条目都需要缓存中的 2 个条目。 所以 set0（缓存中的条目 0,1）将保存所有偶数主内存条目，而 set1 将保存所有奇数条目，因此如果我们跨越它，我们将像这样：
cache 0 (set 0) --> can hold 0,2,4,6,8,10,12,14 of the main memory entries.
cache 1 (set 0) --> can hold 0,2,4,6,8,10,12,14 of the main memory entries.
cache 2 (set 1) --> can hold 1,3,5,7,9,11,13,15 of the main memory entries.
cache 2 (set 0) --> can hold 1,3,5,7,9,11,13,15 of the main memory entries.
重置后缓存为空。
Load from 0 will be missed and will be cached in cache entry 0.
Load from 1 will be missed and will be cached in cache entry 2.
Load from 2 will be missed and will be cached in cache entry 1.
Load from 8 will be missed and will be cached in cache entry 0 (replaced load 0 because we replace the Least Recently Used).
Load from 9 will be missed and will be cached in cache entry 3.
load from 2 will be hit and will be taken from cache entry 1.
在这种情况下，命中率是相同的：1/(5+1) = 1/6 = 16%